ECE 412 Computer Architecture Lectures 22 and 23: Multiprocessor Architecture

11/19/97


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Table of Contents

ECE 412 Computer Architecture Lectures 22 and 23: Multiprocessor Architecture

Lecture 22: Multiprocessor Architecture Basics

Parallel Programming Models

Multiprocessor Architecture Models

Shared Memory Architectural Model

Message Passing Architectural Model a.k.a. Distributed Memory

Dataflow Architectural Model

Systolic Array Architectural Model

Shared Memory Multiprocessor Software: Loop-level parallelism

FORTRAN DOALL Parallel Loop Construct

FORTRAN DOACROSS Parallel Loop Construct

DOACROSS Example

Parallel Loop Execution

Parallel Loop Execution (continued)

Parallel Loop Execution (continued): Iteration Scheduling

Parallel Loop Execution (continued): Barrier Synchronization

Limits of Parallel Processing

Mutual Exclusion

Hardware Synchronization

Implementing lock() and unlock()

Implementing lock() and unlock() (cont.)

lock() and unlock() Example

Need for atomic fetch_and_add()

Lecture 23: System Synchronization Implementation Issues

I. Where are synchronization variables?

I. Where are synchronization variables? (continued)

I. Where are synchronization variables? (continued)

I. Where are synchronization variables? (continued)

I. Where are synchronization variables? Relation to other issues

II. How do caches react to synchronization?

II. How do caches react to synchronization? (continued)

III. How do buffers react to synchronization?

III. How do buffers react to synchronization? (continued)

III. How do buffers react to synchronization? (continued)

III. How do buffers react to synchronization? (continued)

III. How do buffers react to synchronization? (continued)

IV. How does the bus support synchronization?

IV. How does the bus support synchronization? (continued)

V. What is the scope of synchronization?

V. What is the scope of synchronization? (continued)

Author: John Wollenburg Sias

Email: sias@crhc.uiuc.edu