Run-time Spatial Locality Detection and Optimization (PostScript version, PDF version)
Teresa L. Johnson, Matthew C. Merten, and Wen-mei W. Hwu
Proceedings of the 30th International Symposium on Microarchitecture, December, 1997
As the disparity between processor and main memory performance
grows, he number of execution cycles spent waiting for memory
accessed to complete also increases. As a result, latency hiding
techniques are critical for improved application performance on
future processors.
We present a microarchitecture scheme which detects and adapts
to varying spatial locality, dynamically adjusting the amount
of data fetched on a cache miss.
The Spatial Locality Detection Table, introduced in this
paper, facilitates the detection of spatial locality across
adjacent cached blocks.
Results from detailed simulations of several integer programs
show significant speedups.
The improvements are due to the reduction of conflict misses
and capacity missed by utilizing small blocks and small fetch
sizes when spatial locality is absent, and the prefetching
effect of large fetch sizes when spatial locality exists.
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