The Research Group
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Illinois Microarchitecture Project utilizing Advanced Compiler Technology
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Currently at ZeroSoft, Inc.
LinkedIn page
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| Biography |
B.S. with Highest Honors, Electrical Engineering, University of Illinois, 2000
M.S., Electrical Engineering, University of Illinois, 2004
Ph.D., Electrical and Computer Engineering, University of Illinois, 2008
Shane attended the University of Illinois for his undergraduate education
from 1996 to 2000. During that time, he interned for both Intel
and Advanced Micro Devices and was active in a number of organizations,
including Eta Kappa Nu, Tau Beta Pi, and the UIUC Engineering Council.
He has received recognition at multiple levels for his involvement.
For his M.S. thesis research, Shane explored the use of EPIC architecture
features, specifically speculation and predication, to enable aggressive
partial redundancy and partial dead code elimination techniques. Other
published work includes the use of memory and value profiling in compiler
optimization and transformation, and
design and analysis of power-efficient structures for in-order
runahead execution. More recently, he has worked jointly with the
DEPEND group to investigate
the use of compiler technologies to create more secure programs and
architectures.
Shane explored code optimization for data-parallel, many-core
processors in his Ph.D. dissertation.
His interests also involved enabling large-scale program transformations through
analysis. Some of his past work includes development of inexpensive methods to
obtain value and pointer relationship information in program subsections
to support parallelization tools and automated compilers.
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| Research Interests |
- Inexpensive and Efficient Interprocedural Program Analysis
- Large-Scale Program Transformation
- Parallelism Detection and Extraction
- Efficient Architectures
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- CV/Resume: Available upon request.
| Conference Proceedings
Papers |
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CUBA: An Architecture for Efficient CPU/Co-processor Data Communication
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| Isaac Gelado, John H. Kelm, Shane Ryoo, Nacho
Navarro, Steve S. Lumetta, and Wen-mei W. Hwu |
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Proceedings of the 22nd ACM International Conference on Supercomputing,
June 2008.
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Program Optimization Space Pruning for a Multithreaded GPU
[ PS |
PDF |
PDF slides ]
(Copyright ACM 2008. For personal use only.)
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| Shane Ryoo, Christopher I. Rodrigues, Sam S. Stone,
Sara S. Baghsorkhi, Sain-Zee Ueng, John A. Stratton, and Wen-mei W. Hwu
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Proceedings of the 2008 International Symposium on Code
Generation and Optimization, April 2008.
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Optimization Principles and Application Performance Evaluation of a
Multithreaded GPU Using CUDA
[ PS |
PDF |
PDF slides ]
(Copyright ACM 2008. For personal use only.)
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| Shane Ryoo, Christopher I. Rodrigues, Sara
S. Baghsorkhi, Sam S. Stone, David B. Kirk (NVIDIA), and Wen-mei W. Hwu |
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Proceedings of the 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, February 2008.
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Implicit Parallel Programming Models for Thousand-Core Microprocessors
[ PDF ]
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| Wen-mei Hwu, Shane Ryoo, Sain-Zee Ueng,
John H. Kelm, Isaac Gelado, Sam S. Stone, Robert E. Kidd, Sara S.
Baghsorkhi, Aqeel A. Mahesri, Stephanie C. Tsao, Nacho Navarro, Steve S.
Lumetta, Matthew I. Frank, and Sanjay J. Patel |
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Proceedings of the 44th Annual Design Automation Conference, June 2007.
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"Flea-flicker" Multipass Pipelining: An Alternative to the High-Power Out-of-Order Offense
[ PS |
PDF ] |
| Ronald D. Barnes, Shane Ryoo, and Wen-mei W. Hwu |
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Proceedings of the 38th Annual IEEE/ACM Interational Symposium on Microarchitecture, November 2005.
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Program Optimization Carving for GPU Computing
[ DOI ]
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| Shane Ryoo, Christopher I. Rodrigues,
Sam S. Stone, John A. Stratton, Sain-Zee Ueng, Sara S. Baghsorkhi,
and Wen-mei W. Hwu |
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The Special Issue of the Journal of Parallel and Distributed
Computing on General Purpose Parallel Processing Using GPUs, 2008.
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Automatic Discovery of Coarse-Grained Parallelism in Media Applications
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| Shane Ryoo, Sain-Zee Ueng, Christopher I.
Rodrigues, Robert E. Kidd, Matthew I. Frank, and Wen-mei W. Hwu |
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Transactions on HiPEAC I, LNCS 2050, pp. 194-213, 2007.
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Tolerating Cache-Miss Latency With Multipass Pipelines
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| Ronald D. Barnes, Shane Ryoo, and Wen-mei W. Hwu |
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IEEE Micro, Vol. 26, No. 1, pp. 40-47, January-February 2006.
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| Refereed Workshop Publications |
Iteration Disambiguation for Parallelism Identification in Time-Sliced
Applications
[ PS |
PDF |
PDF slides ]
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Shane Ryoo, Christopher I. Rodrigues, and Wen-mei W. Hwu
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The 20th International Workshop on Languages and Compilers
for Parallel Computing (2007), LNCS 5234, pp. 110-124, October 2007.
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Program Optimization Study on a 128-Core GPU
[ PS |
PDF |
PDF slides ]
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Shane Ryoo, Christopher I. Rodrigues, Sam S. Stone, Sara S. Baghsorkhi, Sain-Zee Ueng, and Wen-mei W. Hwu
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The First Workshop on General Purpose Processing on Graphics
Processing Units, October 2007.
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P3DE: Profile-Directed Predicated Partial Dead Code Elimination
[ PowerPoint slides ]
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Shane Ryoo, Sain-Zee Ueng, and Wen-mei W. Hwu
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The 5th Workshop on EPIC Architectures and Compiler Technology, March 2006.
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Applying Scalable Interprocedural Pointer Analysis to Embedded Applications |
| Hillery C. Hunter, Erik M. Nystrom, Shane Ryoo, and Wen-mei W. Hwu |
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Workshop on Compilers and Tools for Constrained Embedded Systems, September 2004.
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| Industry Conference Presentations |
Performance Insights on Executing Non-Graphics Applications on CUDA on the
NVIDIA GeForce 8800 GTX
[ PDF slides ]
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Wen-mei Hwu, David B. Kirk (NVIDIA), Shane Ryoo, Christopher Rodrigues,
John Stratton, and Kuangwei Hwang |
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Presentation at Hot Chips 19, August 2007.
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Itanium Performance Insights
[ PDF slides |
PS
handouts |
PDF handouts ] |
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Wen-mei W. Hwu, John W. Sias, Matthew C. Merten, Erik M. Nystrom, Ronald D. Barnes,
Christopher J. Shannon, Shane Ryoo and Jeff V. Olivier
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Presentation at Microprocessor Forum, October 2001.
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Itanium Performance Insights from the IMPACT Compiler
[ PDF slides | PS handouts | PDF handouts ] |
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John W. Sias, Matthew C. Merten, Erik M. Nystrom, Ronald D. Barnes,Christopher J. Shannon, Joe D. Matarazzo, Shane Ryoo, Jeff V. Olivier and Wen-mei W. Hwu |
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Presentation at Hot Chips 13, August 2001.
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Analyses for Extensive Parallelization of Video Applications in C
[ PS ]
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Shane Ryoo and Wen-mei W. Hwu |
| IMPACT Technical Report, IMPACT-08-02, University
of Illinois at Urbana-Champaign, Urbana, IL, June 2008. |
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Dynamic Tracking of Information-Flow Signatures for Security Checking |
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William Healey, Karthik Pattabiraman, Shane Ryoo, Ravishanker Iyer and Wen-mei W. Hwu |
| Technical Report UILU-ENG-02-2002, University of
Illinois at Urbana-Champaign, January 2007. |
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Exploiting Load Flexibility for Embedded Power Savings |
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Hillery C. Hunter, Shane Ryoo, James Player, Daniel A. Connors, and Wen-mei W. Hwu |
| IMPACT Technical Report, IMPACT-04-01, University of Illinois, Urbana, IL, June 2004. |
Program Optimization Strategies for Data-Parallel Many-Core Processors
[ PS |
PDF ] |
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Shane Ryoo |
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PhD Dissertation, Department of Electrical and Computer Engineering,
University of Illinois, Urbana, IL, 2008. |
Partial Code Elimination in the IMPACT Compiler Framework
[ PS |
PDF ] |
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Shane Ryoo |
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MS Thesis, Department of Electrical and Computer Engineering,
University of Illinois, Urbana, IL, 2004. |
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