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OpenIMPACT Compiler

Gelato

GSRC
The IMPACT Research Group
Illinois Microarchitecture Project utilizing Advanced Compiler Technology
Publications: Research topics

Explicitly-Parallel Instruction Computing

A Systematic Approach to Delivering Instruction-Level Parallelism in EPIC Systems (PDF version, Talk PDF version)
John W. Sias
PhD. Dissertation, Department of Electrical and Computer Engineering, University of Illinois, Urbana IL, 2005.
Abstract

Field-testing IMPACT EPIC Research Results in Itanium 2
(PostScript version | PDF version)
John W. Sias, Sain-zee Ueng, Geoff A. Kent, Ian M. Steiner, Erik M. Nystrom and Wen-mei W. Hwu
Proceedings of the 31st Annual International Symposium on Computer Architecture, pp. 26-37, July 2004.
Abstract

Integrated Predicated and Speculative Execution in the IMPACT EPIC Archtecture (PostScript version, PDF version)
David I. August, Daniel A. Connors, Scott A. Mahlke, John W. Sias, Kevin M. Crozier, Ben-Chung Cheng, Patrick R. Eaton, Qudus B. Olaniran, and Wen-mei W. Hwu
Proceedings of the 25th International Symposium on Computer Architecture, July, 1998
Abstract

See also Predicated Execution, Control Speculation, Data Speculation
Predicated Execution

Enhancing Loop Buffering of Media and Telecommunications Applications Using Low-overhead Predication (PostScript version, PDF version)
John W. Sias, Hillery C. Hunter and Wen-mei W. Hwu
Proceedings of the 34th International Symposium on Microrchitecture, December, 2001.
Abstract

Program Decision Logic Optimization Using Predication and Control Speculation (not available online at this time)
Wen-mei W. Hwu, David I. August and John W. Sias
Proceedings of the IEEE, November, 2001, pp. 1660-1675.

Accurate and Efficient Predicate Analysis with Binary Decision Diagrams (PostScript version, PDF version)
John W. Sias, David I. August, and Wen-mei W. Hwu
Proceedings of the 33rd International Symposium on Microrchitecture, December, 2000
Abstract

Systematic Compilation for Predicated Execution (PostScript version, PDF version)
David I. August
Ph.D. dissertation, Department of Electrical and Computer Engineering,
University of Illinois, Urbana IL, Feb. 2000
Abstract

Condition Awareness Support for Predicate Analysis and Optimization (PostScript version, PDF version)
John Wollenburg Sias
MS thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana IL, 1999

The Program Decision Logic Approach to Predicated Execution (PostScript version, PDF version)
David I. August, John W. Sias, Jean-Michel Puiatti, Scott A. Mahlke, Daniel A. Connors, Kevin M. Crozier, and Wen-mei W. Hwu
Proceedings of the 26th International Symposium on Computer Architecture, May, 1999
Abstract

A Framework for Balancing Control Flow and Predication (PostScript version, PDF version)
David I. August, Wen-mei W. Hwu, and Scott A. Mahlke
Proceedings of the 30th International Symposium on Microarchitecture, December 1997.
Abstract

Supporting Predicated Execution: Techniques and Tradeoffs (PostScript version, PDF version)
Jim McCormick
MS thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana IL, May 1996
Abstract

A Comparison of Full and Partial Predicated Execution Support for ILP Processors (PostScript version, PDF version)
S. A. Mahlke, R. E. Hank, J.E. McCormick, D. I. August, and W. W. Hwu
Proceedings of the 22th International Symposium on Computer Architecture, June 1995, pp. 138-150
Abstract

Characterizing the Impact of Predicated Execution on Branch Prediction (PostScript version, PDF version)
S. A. Mahlke, R. E. Hank, R. A. Bringmann, J. C. Gyllenhaal, D. M. Gallagher, and W. W. Hwu
Proceedings of the 27th International Symposium on Microarchitecture, December 1994, pp. 217-227
Abstract

The Benefit of Predicated Execution for Software Pipelining (PostScript version, PDF version)
Nancy J. Warter, Daniel M. Lavery, and Wen-mei W. Hwu
Proceedings of the 26th Annual Hawaii Int'l Conference on system Sciences, Wailea, Hawaii, Jan. 5-8, 1993, pp 497-506
Abstract

Effective Compiler Support for Predicated Execution Using the Hyperblock (PostScript version, PDF version)
S. A. Mahlke, D. C. Lin, W. Y. Chen, R. E. Hank, and R. A. Bringmann
Proceedings of the 25th International Symposium on Microarchitecture, Dec. 1992, pp. 45-54
Abstract

Compiler Support for Predicated Execution in Superscalar Processors (PostScript version, PDF version)
David Lin
MS thesis, Department of Computer Science, University of Illinois, Urbana IL, Sept. 1990

See also Explicitly-Parallel Instruction Computing
Control Speculation

Enhancing Instruction Level Parallelism Through Complier-Controlled Speculation (PostScript version, PDF version)
Roger Bringmann
PhD thesis, Department of Computer Science, University of Illinois, Urbana IL, May 1995
Abstract

Sentinel Scheduling with Recovery Blocks (PostScript version, PDF version)
David I. August, Brian L. Deitrich, and Scott A. Mahlke
Technical Report CRHC-95-05, Center for Reliable and High-Performance Computing,
University of Illinois, Urbana, IL, Feb. 1995
Abstract

Three Architectural Models for Compiler-Controlled Speculative Execution (PostScript version, PDF version)
P. P. Chang, N.J. Warter, S. A. Mahlke, W. Y. Chen, and W. W. Hwu
IEEE Transactions on Computers, Vol. 44, No. 4, April 1995, pp. 481-494
Abstract

Speculative Execution Exception Recovery using Write-back Suppression (PostScript version, PDF version)
Roger A. Bringmann, Scott A. Mahlke, Richard E. Hank, John C. Gyllenhaal, and Wen-mei W. Hwu
Proceedings of the 26th Annual ACM/IEEE Int'l Symposium on Microarchitecture, Austin, Texas, Dec. 1993, pp. 214-223
Abstract

Sentinel Scheduling: A Model for Compiler-Controlled Speculative Execution
S. A. Mahlke, W. Y. Chen, R. A. Bringmann, R. E. Hank, W. W. Hwu, B. R. Rau, and M. S. Schlansker
ACM Transactions on Computer Systems, Vol. 11, No. 4, Nov. 1993
Abstract

See also Explicitly-Parallel Instruction Computing, Scheduling
Data Speculation

Dynamic Memory Disambiguation Using the Memory Conflict Buffer (PostScript version, PDF version)
D. M. Gallagher, W. Y. Chen, S. A. Mahlke, J. C. Gyllenhaal, W. W. Hwu
Proceedings of the 6th International Conference on Architecture Support for Programming Languages and Operating Systems, San Jose, California, October, 1994. pp.183-195.
Abstract
Interprocedural Pointer Analysis

FULCRA POINTER ANALYSIS FRAMEWORK.(PDF version)
Erik M. Nystron
PhD thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana IL, 2005.

Bottom-up and Top-down Context-Sensitive Summary-based Pointer Analysis.(PostScript version, PDF version)
E. M. Nystrom, H. -S. Kim, W. -M. Hwu.
The proceedings of the 11th Static Analysis Symposium, August 2004.
Abstract

Importance of Heap Specialization in Pointer Analysis.(PostScript version, PDF version)
E. M. Nystrom, H. -S. Kim, W. -M. Hwu.
The proceedings of Program Analysis for Software Tools and Engineering, June 2004.
Abstract

Scalable, precise context-sensitive top-down process for modular points-to analysis.(PostScript version, PDF version)
E. M. Nystrom, H. -S. Kim, W. -M. Hwu.
IMPACT Technical Report, IMPACT-03-03, University of Illinois, Urbana, IL, 2003.
Abstract

Compaction algorithm for precise modular context-sensitive pointer analysis.(PostScript version, PDF version)
H. -S. Kim, E. M. Nystrom, R. D. Barnes, W. -M. Hwu.
IMPACT Technical Report, IMPACT-03-03, University of Illinois, Urbana, IL, 2003.
Abstract

Modular Interprocedural Pointer Analysis Using Access Paths: Design, Implementation, and Evaluation (PostScript version, PDF version)
Ben-Chung Cheng, and Wen-mei W. Hwu
Proceedings of the 2000 ACM SIGPLAN Conference on Programming Language Design and Implementation, Vancouver, British Columbia, Canada, June, 2000

Compile-Time Memory Disambiguation for C Programs (PostScript version, PDF version)
Ben-Chung Cheng
Phd thesis, Department of Computer Science, University of Illinois, Urbana, IL, May 2000

An Empirical Study of Function Pointers Using Spec Benchmarks (PostScript version, PDF version)
Ben-Chung Cheng and Wen-mei W. Hwu
IMPACT Technical Report, IMPACT-99-02, University of Illinois, Urbana, IL 1999

A Practical Interprocedural Pointer Analysis Framework (PostScript version, PDF version)
Ben-Chung Cheng and Wen-mei W. Hwu
IMPACT Technical Report, IMPACT-99-01, University of Illinois, Urbana, IL 1999
Branch Handling

Efficient Instruction Sequencing with Inline Target Insertion (PostScript version, PDF version)
Wen-mei W. Hwu and Pohua Chang
IEEE Transactions on Computers, Vol. 41, No.12, Dec. 1992, pp. 1537-1551
Abstract

Comparing Software and Hardware Schemes For Reducing the Cost of Branches (PostScript version, PDF version)
Wen-mei W. Hwu, Thomas M. Conte, and Pohua Chang
Proceedings of the 16th Annual International Symposium on Computer Architecture, Jerusalem, Israel, May 28- June 1, 1989, pp. 224-233.
Abstract
Instruction Set

Register Connection: A New Approach to Adding Registers into Instruction Set Architectures (PostScript version, PDF version)
Tokuzo Kiyohara, Scott Mahlke, William Chen, Roger Bringmann, Richard Hank, Sadun Anik, Wen-mei Hwu
Proceedings of the 20th Annual International Symposium on Computer Architecture, San Diego, CA, May 17-19, 1993, pp. 247-256
Abstract
Memory System

MATCHING ON-CHIP DATA STORAGE TO TELECOMMUNICATION AND MEDIA APPLICATION PROPERTIES (PDF version)
Hillery C. Hunter
PhD thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana IL, 2004

Compiler-Directed Early Load-Address Generation (PostScript version, PDF version)
Ben-Chung Cheng, Daniel A. Connors, and Wen-mei W. Hwu
Proceedings of the 31th International Symposium on Microarchitecture, December, 1998
Abstract

Characterization of Repeating Data Access Patterns in Integer Benchmarks (PostScript version, PDF version)
Erik M. Nystrom, Roy Dz-ching Ju, and Wen-mei W. Hwu
Memory Performance Issues Workshop at the 28th International Symposium on Computer Architecture, July 2001.
Abstract

Run-Time Cache Bypassing (PostScript version, PDF version)
T. L. Johnson, D. A. Connors, M. C. Merten, and W. W. Hwu
IEEE Transactions on Computers, Vol. 48, No. 12, December 1999, pp. 1338-1354
Abstract

Run-time Spatial Locality Detection and Optimization (PostScript version, PDF version)
Teresa L. Johnson, Matthew C. Merten, and Wen-mei W. Hwu,
Proceedings of the 30th International Symposium on Microarchitecture, December 1-3, 1997
Abstract

Run-time Spatial Locality Detection and Optimization (PostScript version, PDF version)
Teresa L. Johnson, Matthew C. Merten, and Wen-mei W. Hwu,
IMPACT Technical Report, IMPACT-97-02, University of Illinois, Urbana, IL 1997
Abstract

Run-time Cache Hierarchy Management via Reference Analysis (PostScript version, PDF version)
Teresa L. Johnson, and Wen-mei W. Hwu
IMPACT Technical Report, IMPACT-96-01, University of Illinois, Urbana, IL 1996
Abstract

Reducing Cache Misses in Numerical Applications Using Data Relocation and Prefetching (PostScript version, PDF version)
Yoji Yamada, Teresa L. Johnson, Grant Haab, John C. Gyllenhaal, and Wen-mei W. Hwu
Technical Report CRHC-95-04, Center for Reliable and High-Performance Computing, University of Illinois, Urbana, IL 1995
Abstract

Data Relocation and Prefetching for Programs with Large Data Sets (PostScript version, PDF version)
Yoji Yamada
PhD thesis, Department of Computer Science, University of Illinois, Urbana IL, 1995.
Abstract

Data Relocation and Prefetching for Large Data Sets (PostScript version, PDF version)
Y. Yamada, J. Gyllenhaal, G.Haab, W. W. Hwu
Proceedings of the 27th Annual ACM/IEEE International Symposium on Microarchitecture, December, 1994, pp. 118-127
Abstract

The Susceptibility of Programs to Context Switching Effects
W. W. Hwu And T. M. Conte
IEEE Transactions on Computers, Vol. 43, No. 9, Sept. 1994.
Abstract

Tolerating Data Access Latency with Register Preloading (PostScript version, PDF version)
William Y. Chen, Scott A. Mahlke, and Wen-mei W. Hwu
Proceedings of the 1992 Int'l Conf. on Supercomputing, Washington D.C., July, 1992, pp. 104-113
Abstract

Data Access Microarchitectures for Superscalar Processor with Compiler-Assisted Data Prefetching (PostScript version, PDF version)
William Y. Chen, Scott A. Mahlke, Pohua P. Chang, and Wen-mei W. Hwu
Proceedings of the 24th Annual ACM/IEEE Int'l Symposium on Microarchitecture, Albuquerque, New Mexico, Nov. 1991, pp. 69-73
Abstract

The Effect of Code Expanding Optimizations of Instruction Cache Design (PostScript version, PDF version)
William Y. Chen, Pohua Chang, Thomas M. Conte, and Wen-mei W. Hwu
Technical Report CRHC-91-17, Center for Reliable and High-PerformancE, university of Illinois, Urbana, IL, May 1991
Abstract

A Multiported Nonblocking Cache for a Superscalar Uniprocessor (PostScript version, PDF version)
James Sicolo
MS thesis, Department of Computer Science, University of Illinois, Urbana IL, Sept. 1990

Data Preload for Superscalar and VLIW Processors (PostScript version, PDF version)
William Y. Chen
PhD thesis, Department of Computer Science, University of Illinois, Urbana IL, Sept. 1993
Abstract
Scheduling

Speculative Hedge: Regulating Compile-Time Speculation Against Profile Variations (PostScript version, PDF version)
Brian L. Deitrich, Wen-mei W. Hwu
Proceedings of the 29th International Symposium on Microarchitecture, December 2-4, 1996
Abstract

Code Scheduling and Optimization for a Superscalar X86 Microprocessor (PostScript version, PDF version)
Wayne Dugal
MS thesis, Department of Computer Science, University of Illinois, Urbana IL, May, 1995.

The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors (PostScript version, PDF version)
P. P. Chang, D. M. Lavery, S. A. Mahlke, W. Y. Chen, and W. W. Hwu
IEEE Transactions on Computers, Vol. 44, No. 3, March 1995, pp. 353-370
Abstract

Modulo Scheduling with Isomorphic Control Transformations (PostScript version, PDF version)
Nancy J. Warter
PhD thesis, Department of Computer Science, University of Illinois, Urbana IL, Sept. 1994
Abstract

Profile-Assisted Instruction Scheduling (PostScript version, PDF version)
W. Y. Chen, S. A. Mahlke, N. J. Warter, S. Anik, and W. W. Hwu
International Journal for parallel Programming, Vol. 22, No. 2, April 1994, pp. 151-181
Abstract

Enhanced Modulo Scheduling for Loops with Conditional Branches (PostScript version, PDF version)
Nancy J. Warter, Grant E. Haab, Krishnal Subramanian, and John W. Backhaus
Proceedings of 25th Annual ACM/IEEE Int'l Symposium on Microarchitecture, Dec. 1992 pp. 170-179
Abstract

Code Scheduling for VLIW/Superscalar Processors with Limited Register Files (PostScript version, PDF version)
T. Kiyohara and J. Gyllenhaal
Proceedings of the 25th International Symposium on Microarchitecture, Dec. 1992, pp. 197-201
Abstract

Sentinel Scheduling for VLIW and Superscalar Processors (PostScript version, PDF version)
Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu, B. Ramakrishna Rau, and Micheal S. Schlansker
Proceedings of the Fifth Int'l Conference on Architecture Support for Programming Languages and Operating Systems (ASPLOS-V), Boston, MA, Oct. 12-15, 1992, pp.238-247
Abstract

Three Superblock Scheduling Models for Superscalar and Superpipelined Processors (PostScript version, PDF version)
Pohua P. Chang, Nancy J. Warter, Scott Mahlke, William Y. Chen, and Wen-mei W. Hwu
Technical Report CRHC-91-29, Center for Reliable and High-Performance Computing, University of Illinois, Urbana, IL, Dec. 1991
Abstract

Comparing Static And Dynamic Code Scheduling for Multiple-Instruction-Issue Processors (PostScript version, PDF version)
Pohua P. Chang, William Y. Chen, Scott A. Mahlke, and Wen-mei W. Hwu
Proceedings of the 24th Annual ACM/IEEE Int'l Symposium on Microarchitecture, Albuquerque, New Mexico, Nov. 18-20,1991, pp. 69-73
Abstract

IMPACT: An Architectural Framework for Multiple-Instruction-Issue Processors (PostScript version, PDF version)
Pohua P. Chang, Scott A. Mahlke, William Y. Chen, Nancy J. Water, and Wen-mei W. Hwu
Proceedings of the 18th Annual Int'l Symposium on Computer Architecture, Toronto, Canada, May 28, 1991, pp. 266-275
Abstract
Simulation

Evaluation of Some Superscalar and VLIW Processor Designs (PostScript version, PDF version)
John Holm
MS thesis, Department of Computer Science, University of Illinois, Urbana IL, Sept. 1992

Systematic Computer Architecture Prototyping (PostScript version, PDF version)
Thomas M. Conte
PhD thesis, Department of Computer Science, University of Illinois, Urbana IL, Sept. 1992
Abstract
Multiprocessor

Performance Implications of Synchronization Support for Parallel FORTRAN Programs (PostScript version, PDF version)
S. Anik and W. W. Hwu
Journal of Parallel and Distributed Computing, Vol. 22, 1994, pp. 202-215
Abstract
Hardware Cost Analysis

Performance and Cost Analysis of the Execution Stage of Superscalar Microprocessors (PostScript version, PDF version)
Dimitri C. Argyres
MS thesis, Department of Computer Science, University of Illinois, Urbana IL, May 1995.

Systematic Prototyping of Superscalar Computer Architectures
T. M. Conte and W. W. Hwu
Proceedings of the 3rd IEEE International Workshop on Rapid System Prototyping, Research Triangle Park, NC, June 1992.

Benchmark Characterization
T.M. Conte and W. W. Hwu
Proceedings of the 24th Annual Hawaii International Conference on System Sciences, Jan. 8-11, 1991, pp. 364-372.

Java Based Universal Software Distribution Environment

A DYNAMIC APPLICATION ANALYSIS FRAMEWORK(PDF version)
Marie Therese Conte
PhD thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana, IL, 2003.

A Study of Code Reuse and Sharing Characteristics of Java Applications (PostScript version, PDF version)
Marie T. Conte, Andrew R. Trick, John C. Gyllenhaal, and Wen-mei W. Hwu
Workshop on Workload Characterization, Micro-31, November 29th, 1998
Abstract

Optimizing NET Compilers for Improved Java Performance ( Draft (PostScript), Draft (PDF), see IEEE Computer for final version)
Cheng-Hsueh A. Hsieh, Marie T. Conte, Teresa L. Johnson, John C. Gyllenhaal, and Wen-mei W. Hwu,
IEEE Computer, June 1997, pp. 67-75
Abstract

A Study of the Cache and Branch Performance Issues with Running Java on Current Hardware Platforms ( PostScript version, PDF version)
Cheng-Hsueh A. Hsieh, Marie T. Conte, Teresa L. Johnson, John C. Gyllenhaal and Wen-mei W. Hwu,
Proceedings of COMPCON, February 1997, pp. 211-216
Abstract

Java Bytecode to Native Code Translation: The Caffeine Prototype and Preliminary Results (PostScript version, PDF version)
Cheng-Hsueh A. Hsieh, John C. Gyllenhaal, and Wen-mei W. Hwu
Proceedings of the 29th International Symposium on Microarchitecture, December 1996, pp. 90-99
Abstract
Architecture Support

Multiple-Pass Pipelining: Enhancing in-order Microarchitectures to Out-Of-Order Performance(PDF version)
Ronald D. Barnes, JR.
PhD thesis, Department of Electrical and computer Engineering, University of Illinois, Urbana IL, 2005

Modulo Schedule Buffers (PostScript version, PDF version)
Matthew C. Merten and Wen-mei W. Hwu
Proceedings of the 34th International Symposium on Microrchitecture, December, 2001
Abstract Presentation Slides (PostScript version, PDF version)

Compiler Technology for Future Microprocessors (PostScript version, PDF version)
W. W. Hwu, R. E. Hank, D. M. Gallagher, S. A. Mahlke, D. M. Lavery, G. E. Haab, J. C. Gyllenhaal, and D. I. August
Proceedings of the IEEE, Vol. 83, No. 12, December 1995, pp. 1625-1640
Abstract
Code Generation

Efficient Instruction Sequencing with Inline Target Insertion (PostScript version, PDF version)
Wen-mei W. Hwu and Pohua Chang
IEEE Transactions on Computers, Vol. 41, No. 12, Dec. 1992, pp. 1537-1551
Abstract

An Optimizing Compiler Code Generator: A platform for RISC Performance Analysis (PostScript version, PDF version)
William Y. Chen
MS thesis, Department of Computer Science, University of Illinois, Urbana IL, Sept. 1991

A Template for Code Generator Development Using the IMPACT-I C Compile (PostScript version, PDF version)
Roger Bringmann
MS thesis, Department of Computer Science, University of Illinois, Urbana IL, Sept. 1992

Compiler Support for Sparc Architecture Processors (PostScript version, PDF version)
Roland G. Ouellette
MS thesis, Department of Computer Science, University of Illinois, Urbana IL, Sept. 1994

Performance Optimization and Evaluation for the IMPACT X86 Compiler (PostScript version, PDF version)
Benjamin T. Sander
MS thesis, Department of Computer Science, University of Illinois, Urbana IL, May 1995

The IMPACT SC140 Code Generator (PostScript version, PDF version)
Christopher J. Shannon
MS thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana IL, April 2002
Loop Transformations

Tolerating First Level Memory Access Latency In High-Performance Systems (PostScript version, PDF version)
William Chen, Scott Mahlke, and Wen-mei Hwu
Proceedings of the 21st Annual Int'l Conference on Parallel Processing, St Charles, IL, Aug. 1992, pp.(I) 36-43
Abstract

Executing Nested Parallel Loops On Shared-Memory Multiprocessors (PostScript version, PDF version)
Sadun. Anik and Wen-mei Hwu
Proceedings of the 21st Annual Int'l Conference on Parallel Processing, St. Charles, IL, Aug. 1992, pp.(III) 241-244
Abstract

The Effect of Compiler Optimizations On Available Parallelism In Scalar Programs (PostScript version, PDF version)
Scott A. Mahlke, Nancy J. Warter, William Y. Chen, Pohua P. Chang, and Wen-mei W. Hwu
Proceedings of the 20th Annual Int'l Conference on Parallel Processing, St. Charles, IL, Aug. 12-16, 1991, pp. 142-145
Abstract

Performance Implications of Synchronization Support for Parallel Fortran Programs (PostScript version, PDF version)
Sadun Anik, and Wen-mei W. Hwu
Technical Report CRHC-91-21, Center for Reliable and High-Performance Computing, University of Illinois, Urbana, IL, Jun. 1991
Abstract

Architectural and Software Support for Executing Numerical Applications on High Performance Computers (PostScript version, PDF version)
Sadun Anik
PhD thesis, Department of Computer Science, University of Illinois, Urbana IL, Sept. 1993, CRHC-93-19
Abstract
Machine Description

Optimization of Machine Descriptions for Efficient Use (IJPP owns distribution rights, see CatchWord or UnCover for a reprint)
John C. Gyllenhaal, Wen-mei W. Hwu, and B. Ramakrishna Rau
International Journal of Parallel Programming, vol. 26, no. 4, August 1998, pp. 417-447
Abstract

An Efficient Framework For Performing Execution-Constraint-Sensitive Transformations That Increase Instruction-Level Parallelism ( PostScript version, PDF version)
Appendix A ( PostScript version, PDF version) (not included in above file)
J. Gyllenhaal
Ph.D. thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana IL, September 1997
Abstract

Optimization of Machine Descriptions for Efficient Use (PostScript version, PDF version)
John C. Gyllenhaal, Wen-mei W. Hwu, and B. Ramakrishna Rau
Proceedings of the 29th International Symposium on Microarchitecture, December 1996.
Abstract

HMDES Version 2.0 Specification (PostScript version, PDF version)
John C. Gyllenhaal, Wen-mei W. Hwu, B. Ramakrishna Rau
IMPACT Technical Report, IMPACT-96-03, University of Illinois, Urbana, IL 1996.

A Machine Description Language for Compilation (PostScript version, PDF version)
J. Gyllenhaal
MS thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana IL, Sept. 1994
Optimization

Extracting Hardware-Detected Program Phases for Post-Link Optimization Ronald D.Barnes
Master thesis, Department of Computer Science, University of Illinois, Urbana IL, 2002.

Unrolling-Based Optimizations for Modulo Scheduling (PostScript version, PDF version)
D. M. Lavery, and W. W. Hwu
Proceedings of the 28th Annual International Symposium on Microarchitecture, Dec. 1995, pp. 327-337
Abstract

Compiler Code Transformations for Superscalar-Based High-Performance Systems (PostScript version, PDF version)
Scott A. Mahlke, William Y. Chen, John C. Gyllenhaal, Wen-mei W. Hwu, P.P. Chang, and T.Kiyohara
Proceedings of Supercomputing 1992, Minneapolis, Minnisota, Nov. 16-20, 1992, pp. 808-817
Abstract

Design and Implementation of a Protable Global Code Optimizer (PostScript version, PDF version)
Scott A. Mahlke
MS thesis, Department of Computer Science, University of Illinois, Urbana IL, Sept. 1992

Profile-Guided Automatic Inline Expansion for C Programs (PostScript version, PDF version)
Pohua P. Chang, Scott A. Mahlke, William Y. Chen, and Wen-mei W. Hwu
Software Practice and Experience, May 1992, Vol. 22, No. 5, pp. 349-369
Abstract

Using Profile Information to Assist Classic Compiler Code Optimizations (PostScript version, PDF version)
Pohua P. Chang, Scott A. Mahlke, and Wen-mei W. Hwu
Software Practice and Experience, Dec. 1991, Vol. 21, No. 12, pp. 1301-1321
Abstract

Control Flow Optimization for Supercomputer Scalar Processing (PostScript version, PDF version)
P. P. Chang and W. W. Hwu
Proceedings of the 1989 Int'l Conf. on Supercomputing, Crete, Greece, Jun. 5-9, 1989
Abstract
Register Allocation

Machine Independent Register Allocation for the IMPACT-I C Compiler (PostScript version, PDF version)
R. E. Hank
MS thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana IL, 1993

Scalar Program Performance on Muliple-Instruction-Issue Processors with a Limited Number of Registers (PostScript version, PDF version)
Scott A. Mahlke, William Y. Chen, Pohua P. Chang, and Wen-mei W. Hwu
Proceedings of the 25th Annual Hawaii Int'l Conference on System Sciences, Jan. 6-9, 1992, pp. 34-44
Abstract
Structure

Region-Based Compilation: An Introduction and Motivation (IJPP owns distribution rights, see UnCover for a reprint)
R. E. Hank, and W. W. Hwu, and B. R. Rau
International Journal of Parallel Programming, vol. 25, no. 2, April 1997, pp. 113-146
Abstract

Region-Based Compilation (PostScript version, PDF version)
R. E. Hank
Phd thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana IL, May 1996
Abstract

Region-Based Compilation: An Introduction and Motivation (PostScript version, PDF version)
R. E. Hank, and W. W. Hwu, and B. R. Rau
Proceedings of the 28th Annual International Symposium on Microarchitecture, Dec. 1995, pp. 158-168
Abstract

Superblock Formation Using Static Program Analysis (PostScript version, PDF version)
Richard E. Hank, Scott A. Mahlke, Roger A. Bringmann, John C. Gyllenhaal, and Wen-mei W. Hwu
Proceedings of the 26th Annual ACM/IEEE Int'l Symposium on Microarchitecture, Austin, Texas, Dec. 1993, pp. 247-256
Abstract

The Superblock: An Effective Technique for VLIW and Superscalar Compilation (PostScript version, PDF version)
Wen-mei W. Hwu, Scott A. Mahlke, William Y. Chen, Pohua P. Chang, Nancy J. Warter, Roger A. Bringmann, Roland G. Ouellette, Richard E. Hank, Tokuzo Kiyohara, Grant E. Haab, John G. Holm, and Daniel M. Lavery
The Journal of Supercomputing, Kluwer Academic Publishers, 1993, pp. 229-248
Abstract
Fault Tolerant

Compiler-Assisted Multiple Instruction Retry (PostScript version, PDF version)
C. C. Li, S. K. Chen, W. K. Fuchs, and W. W. Hwu
IEEE Transactions on Computers, Vol.44, No.1, Jan. 1995.
Abstract

Incremental Compiler Transformations for Multiple Instruction Retry (PostScript version, PDF version)
S. K. Chen, N. J. Alewine, W. K. Fuchs, and W. W. Hwu
Software, Practice & Experience, John Wiley & Sons Ltd., Vol. 24(9), Sept. 1994, pp. 1-20.
Abstract

Compiler-Assisted Multiple Instruction Rollback Recovery Using A Read Buffer
N. Alewine, S.K. Chen, W.K. Fuchs, and W. W. Hwu
IEEE Transactions on Computers, 1994.

Branch Recovery with Compiler-Assisted Multiple Insturction Retry
N. J. Alewine, S. K. Chen, C. C. Li, W. K. Fuchs, and W. W. Hwu
Proceedings of the 22nd Annual International Symposium on Fault-Tolerant Computing, Boston, MA, July 8-10, 1992, pp. 66-73.

Post-Link Optimization

Code Reordering and Speculation Support for Dynamic Optimization Systems (PostScript version, PDF version)
Erik M. Nystrom, Ronald D. Barnes, Matthew C. Merten, and Wen-mei W. Hwu
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, September 8-12, 2001.
Abstract

An Architectural Framework for Run-Time Optimization (PostScript version, PDF version)
Matthew C. Merten, Andrew R. Trick, Ronald D. Barnes, Erik M. Nystrom, Christopher N. George, John C. Gyllenhaal, and Wen-mei W. Hwu
IEEE Transactions on Computers, Vol. 50, No. 6, June 2001, pp. 567-589.
Abstract

A Hardware Mechanism for Dynamic Extraction and Relayout of Program Hot Spots (PostScript version, PDF version)
Matthew C. Merten, Andrew R. Trick, Erik M. Nystrom, Ronald D. Barnes, and Wen-mei W. Hwu
Proceedings of the 27th International Symposium on Computer Architecture, June 2000, pp. 59-70.
Abstract Presentation Slides (PostScript version, PDF version)

A Hardware-Driven Profiling Scheme for Identifying Program Hot Spots to Support Runtime Optimization (PostScript version, PDF version)
Matthew C. Merten, Andrew R. Trick, Christopher N. George, John C. Gyllenhaal, and Wen-mei W. Hwu
Proceedings of the 26th International Symposium on Computer Architecture, May, 1999, pp. 136-147.
Abstract Presentation Slides (PostScript version, PDF version)

A Framework for Profile-Driven Optimization in the IMPACT Binary Reoptimization System (PostScript version, PDF version)
Matthew C. Merten
MS thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana IL, June 1999

A Framework for Install-Time Optimization of Binary Dynamic-Link Libraries (PostScript version, PDF version)
Christopher N. George
MS thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana IL, May 1999

Optimization and Executable Regeneration in the IMPACT Binary Reoptimization Framework (PostScript version, PDF version)
Michael S. Thiems
MS thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana IL, August 1998

An Overview of the IMPACT X86 Binary Reoptimization Framework (PostScript version, PDF version)
Matthew C. Merten, and Michael S. Thiems
IMPACT Technical Report, IMPACT-98-05, University of Illinois, Urbana, IL 1998
Computation Reuse/Value Prediction

Hardware Support for Dynamic Activation of Compiler-Directed Computation Reuse (PostScript version, PDF version)
Daniel. A. Connors, Hillery C. Hunter, Ben-Chung Cheng, and Wen-mei W. Hwu
Proceedings of the 9th International Conference on Architecture Support for Programming Languages and Operating Systems, November 2000.
Abstract

Eliminating Dynamic Computation Redundancy ( PostScript version, PDF version)
D. A. Connors
Ph.D. dissertation, Department of Electrical and Computer Engineering, University of Illinois, Urbana IL, May 2000
Abstract

Compiler-Directed Dynamic Computation Reuse: Rationale and Initial Results (PostScript version, PDF version)
Daniel A. Connors and Wen-mei W. Hwu
Proceedings of the 32nd International Symposium on Microarchitecture, November, 1999
Abstract
Miscellaneous Research

A Software-Oriented Floating-Point Format for Enhancing Automotive Control Systems (PostScript version, PDF version)
Yoji Yamada, Daniel A. Connors, and Wen-mei W. Hwu
Workshop on Compiler and Architecture Support for Embedded Computing Systems (CASES98), December, 1998
Abstract

XPROF: An Execution Profiler for Window-oriented Applications (PostScript version, PDF version)
Aloke Gupta and Wen-mei W. Hwu
Software, Practice & Experience, John Wiley & Sons Ltd., Vol. 23 (5), May 1993, pp. 487-510
Abstract

An Execution Profiler for Window-oriented Applications (PostScript version, PDF version)
Aloke Gupta and Wen-mei W. Hwu
Technical Report CRHC-92-02, Center for Reliable and High-Performance Computing, University of Illinois, Urbana, IL, Jun. 1992
Abstract

Performance Aspects of Computers with Graphical User Interfaces (PostScript version, PDF version)
Aloke Gupta
PhD thesis, Department of Computer Science, University of Illinois, Urbana IL, April 1993, CRHC-93-09
Abstract
Maintained by John Stratton (stratton at crhc dot uiuc dot edu)