IMPACT Papers with Impact!

(2008) Optimization Principles and Application Performance Evaluation of a Multithreaded GPU Using CUDA

The IMPACT Group has become a major source of advanced compiler technology for the U.S. microprocessor industry. Our work on superblocks and hyperblocks has become part of the technology base of new compilers in major corporations such as Sun Microsystems, Intel, Hewlett-Packard, IBM, AMD, Lucent, and Motorola, all of whom have licensed our IMPACT compiler for technology transfer. And when Intel and HP announced their IA-64 (Itanium) product line in 1997, they publicly acknowledged their use of IMPACT in deriving critical early-performance results for the new architecture. More recently, the superblock techniques have been incorporated into GCC.

About Us - Present

Toward Ultra-Efficient Task and Memory Parallelism

Since 1994, the IMPACT compiler infrastructure has been distributed to MIT, Stanford, UCLA, CMU, Michigan, Texas, Princeton, CSLA, and NCSU, among other schools, helping them develop strong research programs that require a full-fledged compiler infrastructure.

In 1999, the IMPACT group started to transition into high-level computation and memory parallelism for future computing platforms. We recognized that the future scaling of microprocessor clock frequency would have to slow down due to power budget limits and transistor variability. In fact, the future of high-performance computing would hinge on the ability to produce and deploy parts that achieve greater performance-per-watt than can be achieved by instruction-level parallelism alone. Under this assumption, hardware must be organized into communicating compute engines with well-organized flows of both data and control. Although ILP will continue to be exploited within each compute engine, the required power efficiencies dictate that the engines have only minimal coupling in accessing memory data, while some of the compute engines will likely be customized for particular applications.

In 1999, Wen-mei received the prestigious ACM Grace M. Hopper Award, "for the design and implementation of the IMPACT compiler infrastructure, which has been used extensively both by the microprocessor industry as a baseline for product development and by academia as a basis for advanced research and development in computer architecture and compiler design." Here at Illinois, Wen-mei received the prestigious 1994 University Scholars Award and the Tau Beta Pi 2001 Daniel Drucker Eminent Faculty Award.

At this early date, the group already recognized that most programs, whether compilers, media players, molecular dynamics simulators, or database servers, would need ample parallelism in their high-level algorithms; and that this high-level parallelism would have to be accessible to the compiler in order to effectively use the hardware. The key would be new program analysis strategies, possibly coupled with new domain-specific programming models, to unleash the application parallelism and dramatically improve the efficiency of the hardware. During our ILP era, the IMPACT group developed program analysis capabilities by working on pointer analysis and predicated code analysis. This work has formed the foundation of our current scalable deep-program analysis, giving the compiler access to high-level parallelism in large, complex applications. Interested readers can check the 2004 ACM Static Analysis Symposium paper by Erik Nystrom et al. for a snapshot of the IMPACT Group's scalable deep-program analysis systems.

In 1995, Wen-mei teamed up with the late Dr. Bob Rau, head of HP Labs, and Prof. Krishna Palem at NYU to develop a compiler infrastructure called Trimaran, which has now been downloaded by more than 600 research institutions, and today, many research papers feature experiments based on IMPACT and Trimaran.

In 1999, the Semiconductor Research Corporation (SRC), the research arm of the Semiconductor Industry Association, funded the IMPACT Group to investigate flexible and efficient multicore processors. Two years later, our group was invited to join the newly established MARCO / DARPA Center for Circuit and System Solutions (C2S2), a multi-university consortium to remove major circuit, system, and software roadblocks for the semiconductor industry. Other institutions in the center include MIT, Berkeley, Stanford, and CMU. C2S2 funding helped us develop our vision of ultra-low-power computers based on architectures supporting high-level parallelism and our IMPACT compiler technology. In 2003, MARCO moved the IMPACT group to the Gigascale Systems Research Center (GSRC), which enabled us to push our vision further in collaboration with CAD and domain-specific programming model teams at Berkeley. Since then, the team has developed scalable deep software analysis systems to move the memory and computation structures of the application software into the programmable fabrics we anticipate in future hardware. Interested readers can check Wen-mei Hwu's recent ACM SigMicro online seminar for an overview of the IMPACT group's vision for the hardware and software techniques that will enable ultra-power-efficient computers in the next two decades.