Heterogeneous CPU-FPGA systems are evolving towards tighter integration between devices for improved performance, programmability, and energy efficiency. This tighter integration enables collaborative execution between CPUs and FPGAs in a system. Unlike traditional use of FPGAs as off-load accelerators where an entire kernel is executed on the FPGA while the CPU idles waiting for the result, collaborative execution makes better use of overall system resources by involving the CPU in the execution, thereby and achieving higher performance. In this paper, we evaluate the potential of collaborative execution between CPUs and FPGAs using OpenCL High-Level Synthesis. We compare various collaborative techniques such as data partitioning and task partitioning and assess the tradeoffs between them. We also study the behavior of kernel duplication in a collaborative context. Finally, we provide insights for designing future CPU-FPGA collaborative applications.