Explicitly Parallel Instruction Computing (EPIC) architectures require
the compiler to express program instruction level parallelism directly
to the hardware. EPIC techniques which enable the compiler to
represent control speculation, data dependence speculation, and
predication have individually been shown to be very effective.
However, these techniques have not been studied in combination with
each other. This paper presents the IMPACT Architecture to address
the issues involved in designing processors based on these EPIC
concepts. In particular, we focus on new execution and recovery
models in which microarchitectural support for predicated execution is
also used to enable efficient recovery from exceptions caused by
speculatively executed instructions. This paper demonstrates that a
coherent framework to integrate the three techniques can be elegantly
designed to achieve much better performance than each individual
technique could alone provide.