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Pedro Bruel, Sai Rahul Chalamalasetti, Chris Dalton, Izzat El Hajj, Alfredo Goldman, Catherine Graves, Wen-mei Hwu, Phil Laplante, Dejan Milojicic, Geoffrey Ndu, John Paul Strachan
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The deceleration of transistor feature size scalinghas motivated growing adoption of specialized accelerators implementedas GPUs, FPGAs, ASICs, and more recently newtypes of computing such as neuromorphic, bio-inspired, ultra lowenergy, reversible, stochastic, optical, quantum, combinations,and others unforeseen. There is a tension between specializationand generalization, with the current state trending to master slavemodels where accelerators (slaves) are instructed by a generalpurpose system (master) running an Operating System (OS).Traditionally, an OS is a layer between hardware and applicationsand its primary function is to manage hardware resources andprovide a common abstraction to applications. Does this function,however, apply to new types of computing paradigms?
This paper revisits OS functionality for memristor-basedaccelerators. We explore one accelerator implementation, theDot Product Engine (DPE), for a select pattern of applicationsin machine learning, imaging, and scientific computing and asmall set of use cases. We explore typical OS functionality,such as reconfiguration, partitioning, security, virtualization, andprogramming. We also explore new types of functionality, such asprecision and trustworthiness of reconfiguration. We claim thatmaking an accelerator, such as the DPE, more general will resultin broader adoption and better utilization.
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